Pace the ring, then read the DMAC config out of the IPL ROM: audio is cheap and the disk is not

Two sessions that were never separated in the working tree, so they land as one
commit. check.sh ALL GREEN before and after both.

SESSION 19 -- the ring rig gets a frame clock (FINDINGS 51).

src/player/stream.s had no frame clock: it asked for record i the instant it
finished i-1, outran any finite pipe, and never let the ring back up. The 49.1
sweep passing at 48 KB was therefore a wrap-correctness result and nothing else.
PACE/PACEON ($18034/$18038) hold the decoder to 12 fps, so FR_HEAD-FR_TAIL
finally means what it reads as: whole frames the decoder could still draw with
delivery stopped dead. PACEON=0 free-runs and is what the wrap gate still uses,
so every figure in 49 is unmoved.

Paced, on the gate container: 64 KB holds 2 frames, 256 KB holds 7-8, 512 KB
holds 14-15, all pixel-exact. Tolerance is ceiling-1, measured by cutting the
pipe: 256 KB buys 500 ms of dead pipe, not 583.

SLACK IS ACCUMULATED, NOT OWNED. It is built out of pipe-wire and a seek spends
all of it. At 488 KB/s a 256 KB ring needs 4.83 s of play to reach its ceiling
from empty; 512 KB needs 8.42 s to reach 14. A bigger ring raises the ceiling
AND lengthens the climb, so a branch point does not ask "is the buffer big
enough" but "has there been enough play since the last one" -- and Dragon's
Lair's decision points are seconds apart. The rig now also says WHICH resource
is binding: at 460 KB/s every ring from 192 KB to 512 KB is rate-bound at
ceiling 4 and never fills, so larger rings are dead RAM in that scene.
20_seek_slack.py is the same model rewritten in Python from record sizes,
sharing no code with the Lua producer: 35/35 ceilings inside its bracket.

SESSION 20 -- the DMAC configuration was in the IPL ROM the whole time
(FINDINGS 52).

ROADMAP's "do this first" was to put the ADPCM stream on the bus. That needs a
clocks-per-byte figure for the audio channel, and 11_cpu_budget.py was charging
audio the DISK's rate -- 5 clk/B, its own help text calling it "single-address,
bus held". Audio was being charged the favourable end of B3, a 242 KB/s open
question.

It never had to be a guess. The IPL ROM programs all four HD63450 channels
itself and MAME boots the rig with it, so 21_iplrom_dmac.py reads the
configuration out of the image and decodes the MC68450 fields. Eight
(address, expected bytes, meaning) sites; a mismatch or an unknown revision
exits non-zero. In check.sh, no emulator, milliseconds.

ch3 DCR=$80, OCR=$32: dual address, 8-bit port, cycle steal WITHOUT hold,
REQG=10 external request. The DMAC arbitrates once per byte with no burst to
amortise the 5..8 + 2 over, so an audio byte is 16..19 clocks, not 5 -- the old
debit was 3.2x..3.8x small. And on the bus it is still nothing: 651 B/frame is
1.25%..1.48% of a frame, about 4% of what the decoder leaves. P6's bus risk
does not materialise. The unit worry was worth checking and nearly right: 15.6
kHz is 8 MHz/512 = 15,625 samples/s, two 4-bit samples to a byte = 7,812.5 B/s
exactly, and AUDIO_KBPS=7.8 is that in decimal kB while the tool multiplied by
1024.

THE DISK CHANNEL IS PROGRAMMED IDENTICALLY. ch1 (SASI) is DCR=$80 too, and so
is ch0. That is 16..19 clocks per delivered byte, where 42.4 brackets W at 5..12
and 42.5 has W=8 already missing 47/120 frames. The only worked example of a
disk DMA configuration on this machine sits above the entire bracket, and at
that price nothing fits at any container size. It is not scsiexrom.bin so B3
stays open -- what changed is that a cheap configuration is now the thing that
has to be SHOWN. W <= 12 is a requirement on the player's DMAC programming, not
a range the hardware hands us, and it is now the largest open number in the
project, ahead of the rate.

An unforced cross-check fell out: 15_bus_occupancy.py's new W sweep puts W=8 at
105.7% of the frame, agreeing with 42.5's 47/120, from mode histograms and bus
clocks respectively, two models sharing no code.

Also: ADPCM outranks the disk at the arbiter (CPR 1 against 2), so an audio byte
never waits and a video byte does -- relevant to 51's smooth-rate delivery model.

README MEDIA.

stream.lua gains DLX_SNAP_EVERY=1 (needs DLX_PACE, off by default, on no path
check.sh takes) and tools/media/make_readme_media.py turns the PNGs into
docs/img/. The stills and both clips are MAME's own screen pixels.

Building it turned up something worth recording. 116 of 119 captured frames are
pixel-exact against dlx.py; three are TORN -- frame n on top, frame n-1 below
the tear line -- because MAME captured the screen while the block loop was
partway down it. decode.s writes straight to the displayed page (one display
path, 28.1), so a real player tears the same way, and this is the first time
that consequence has been visible rather than argued. The script ASSERTS the
tear and refuses to build otherwise, rather than trimming three frames and
reporting "every frame I kept is exact". Second correction the capture forced:
the snapshot fires before frame n is decoded, so the obvious reading is that it
holds frame n-1 -- it does not, because MAME renders the screen at the end of
the machine frame, by which time the 68000 has finished frame n.

11_cpu_budget.py's "validated to within 1 pt" line is also corrected: the model
reads 2..10 pt HIGH and by more as the frame gets harder, which was already true
before either session.

src/player/decode.s is unchanged; decode.bin is still 1,296 B at the same MD5.

Claude-Session: https://claude.ai/code/session_01194oWYW8DQXK1SZ2DnChW6

tools/bench/prep_stream.py

@@ -0,0 +1,93 @@
+#!/usr/bin/env python3
+"""Lay a DLX3 container out as a DISK for the ring-buffer rig (FINDINGS 49).
+
+    python3 tools/bench/prep_stream.py <in.dlx> [--out tmp/stream]
+
+prep_dlx.py's output is one blob that tools/bench/decode.lua pushes into
+emulated RAM in its entirety.  That is what makes its rig RAM-bound -- a `scsi`
+window is 5,261,814 B of stream and needs a 6 MB machine to hold it (FINDINGS
+45) -- and, much more importantly, it is nothing like the shipping player, which
+never holds a window at once.
+
+This writes three files instead:
+
+  <out>_cb.bin    codebooks + palette.  ~10 KB, loaded into RAM once, exactly as
+                  before: these are LOAD-TIME costs and not per-frame ones.
+  <out>_disk.bin  the frame records, `[u32 len][body]` each padded up to 4, laid
+                  end to end.  tools/bench/stream.lua reads this from the HOST
+                  filesystem and feeds it into a bounded ring, so the emulated
+                  machine's RAM stops bounding how much of a window can be
+                  tested.  A stock 2 MB machine can now run all 120 frames.
+  <out>_meta.lua  geometry, and the record index.
+
+THE RECORD INDEX IS NOT A CONVENIENCE.  src/player/stream.s takes each frame's
+base address from a descriptor the producer wrote, rather than deriving it from
+where the last frame ended, because under the `aligned` wrap policy the next
+record may be at the ring's base instead of just after its predecessor.  The
+producer therefore has to know record boundaries before it places them -- which
+is what an index is.  A branching laserdisc game needs one anyway to seek to a
+branch point, so the policy that costs no clocks (tools/analysis/19_ring_stream.py)
+reuses a structure the player cannot avoid.
+
+The 4-byte record padding is the same one decode.s needs and DLX3 already
+carries: `move.l (a0)+,d0` on an odd address is an ADDRESS ERROR on a 68000, not
+a slow read.  FINDINGS 28.3.
+
+NO SYNTHETIC TIMING FRAMES.  prep_dlx.py appends ten of them to price the block
+modes separately; this rig measures delivery, not decode, and its per-frame cost
+anchors are prep_dlx.py's job.  Mixing them in would put frames on the wire that
+no encoder emits and no rate controller sized.
+"""
+import sys, os, argparse
+sys.path.insert(0, "tools/encoder")
+sys.path.insert(0, "tools/bench")
+import numpy as np
+from dlx import DLX
+import dlxload as DL
+
+ap = argparse.ArgumentParser()
+ap.add_argument("container")
+ap.add_argument("--out", default="tmp/stream")
+a = ap.parse_args()
+
+d = DLX(a.container)
+if d.idx_bytes != 1:
+    sys.exit("2-byte codebook indices: src/player/ assumes 1 (k<=256)")
+if not d.has_spans:
+    sys.exit(f"{a.container} is DLX{d.version}: src/player/stream.s expects the "
+             f"DLX3 span section (see prep_dlx.py for why a DLX2 container "
+             f"decodes as garbage rather than merely losing its spans).")
+
+cb1, cb4 = DL.expand_codebooks(d)
+palb, dark, rendered = DL.pack_palette(d)
+open(a.out + "_cb.bin", "wb").write(cb1.tobytes() + cb4.tobytes() + palb.tobytes())
+
+disk, index = bytearray(), []
+for (o, n) in d.frames:
+    start = len(disk)
+    disk += n.to_bytes(4, "big") + d.raw[o:o + n]
+    while len(disk) % 4:
+        disk += b"\0"
+    index.append((start, len(disk) - start))
+open(a.out + "_disk.bin", "wb").write(bytes(disk))
+
+rec = np.array([n for _, n in index])
+with open(a.out + "_meta.lua", "w") as fh:
+    fh.write("-- generated by tools/bench/prep_stream.py -- do not edit\nreturn {\n")
+    fh.write(f"  W={d.W}, H={d.H}, fps={d.fps}, nframes={d.nframes}, dark={dark},\n")
+    fh.write(f"  cb1_len={cb1.nbytes}, cb4_len={cb4.nbytes}, pal_len={palb.nbytes},\n")
+    fh.write(f"  disk_len={len(disk)}, maxrec={int(rec.max())},\n")
+    fh.write("  index={\n")
+    for off, ln in index:
+        fh.write(f"    {{off={off}, len={ln}}},\n")
+    fh.write("  },\n}\n")
+
+print(f"{a.container}: {d.nframes} frames, {d.W}x{d.H}")
+print(f"  codebooks+palette {cb1.nbytes + cb4.nbytes + palb.nbytes:,} B -> "
+      f"{a.out}_cb.bin")
+print(f"  disk image {len(disk):,} B -> {a.out}_disk.bin  "
+      f"(records: min {rec.min():,} median {int(np.median(rec)):,} "
+      f"max {rec.max():,})")
+print(f"  wire rate {rec.mean()*d.fps/1024:.1f} KB/s video at {d.fps} fps")
+print(f"  A ring must hold one whole record contiguously: >= {rec.max():,} B "
+      f"({rec.max()/1024:.1f} KB) before any policy or prefill.")