Put the data phase on the DMAC, and find auto-request is charged by time
ROADMAP P4a. src/player/dma.i programs HD63450 channel 1 and takes the SCSI DATA IN phase off the CPU; src/player/dmagate.s reads the same 2,048 B at LBA 1000 three ways -- PIO, the channel with the bus held, the channel stealing cycles -- and all three are byte-exact against the host's copy of the volume. The evidence never reads $EA0015, because 57.3 established that it cannot: with the DMAC's OWN asserted MAME cannot tell a CPU-driven byte there from a DMAC-driven one. The discriminator is the CPU's own progress. MTC is sampled by the INSTRUCTION AFTER the one that starts the channel, and held it reads 0 of 2,048 -- the whole transfer happened between two instructions, because the 68000 did not execute in between -- against the full count and 426 loop trips for the stealing configuration. Put the stealing registers in the held slot and every byte still arrives and tools/bench/dma_run.sh goes RED, which is what says the counter can come out different; 58.3's vacuous "UNDERRUNS: 0/120" is the trap being avoided. tools/analysis/27_dmac_config.py decodes the four register bytes out of the player's own source, with the MC68450 field tables now in one copy (tools/analysis/mc68450.py) shared with 21_iplrom_dmac.py, so the player's configuration and the IPL ROM's 16..19 clk/B one are the same decoding. Three bounds on the apparatus, read out of MAME 0.277 rather than inferred: the CZ-6BS1 has NO request line to the DMAC (its flow control is DTACK), so external request cannot be run; single address cannot be run either, because only channel 0 has device callbacks; and only burst is modelled as held. Of the four rows of the W ladder exactly one -- dual address held -- has a code path here, and it is the one demonstrated. W did not move by one clock, for the third session running. What outlives the emulator is the currency. Every W in this project is clocks per DELIVERED byte, which presumes the device asks; an auto-requested channel spends its share of the bus whether or not a byte is there, so a record costs what it costs to ARRIVE -- halve the delivery rate and the CPU cost of the same record doubles. tools/analysis/28_autorequest_cost.py prices it from MC68450 3.8 and 5.2.3.3.2, gating its formulas against Table 5-3's sixteen rows first. At 37,405 B and an explicit 460 KB/s: max rate costs the whole 95.3% of a frame the record takes to land, and of the GCR's four bus shares only BR=00, 50%, carries the rate -- 10.61 clk/B, 47.6% of a frame, against 40.4% for the W=9 row and 391.8% measured for PIO. The GCR is a design lever nothing in this tree had named. 59.4 changes what is left. sc_in_data now REFUSES a windowed read when the data phase is the channel's (SCE_WINDOW), because a channel writes a contiguous run and cannot drop the 300 B in front of a record. 117 of 120 records need one, so sector-aligned records have gone from a preference in ROADMAP's re-encode bundle to the precondition the transport enforces -- and that bundle is now the only thing between this tree and M2. One collision, recorded because the procedure is the finding: DM_USE first sat at $18300, which is ring.i's XF_SLOT mailbox, and the P4b stage -- untouched by this work -- went red on a run that never reached its snapshot. check.sh was ALL GREEN before any of this, which is what made that red unambiguous. ALL GREEN after too, with one new stage. decode.bin is unchanged at 1,296 B and the same MD5. Claude-Session: https://claude.ai/code/session_01194oWYW8DQXK1SZ2DnChW6
This commit is contained in:
prosolis
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#!/usr/bin/env python3
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"""What the PLAYER programs into the DMAC -- read out of the assembler source.
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python3 tools/analysis/27_dmac_config.py [src/player/dma.i]
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ROADMAP P4a asks for a DMAC configuration that HOLDS THE BUS, and the whole
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weight of the claim is in four register bytes. tools/analysis/21_iplrom_dmac.py
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already reads the IPL ROM's four channels the same way, out of the shipping
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image, and found Sharp's own disk channel at 16..19 clocks a byte (FINDINGS
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52.5) -- above the entire bracket this project costs P4 in. This is the other
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half of that comparison: the same MC68450 field tables (tools/analysis/
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mc68450.py, one copy) applied to the bytes src/player/dma.i actually programs.
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IT PARSES THE SOURCE RATHER THAN RESTATING IT. A constant typed into this file
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would be a claim about the player that the player could quietly stop honouring;
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the equates are read out of src/player/dma.i, so a change there changes what is
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printed here and a mismatch between the two is not expressible.
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IT IS A GATE. Each configuration is checked against what it is FOR -- held
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must decode as a mode that keeps the bus, stealing must decode as one that does
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not -- and a disagreement exits non-zero rather than printing a paragraph.
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WHAT IT IS NOT: a rate. Nothing here is a measurement of anything. It says
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which mode the player asks the chip for; tools/bench/dma_run.sh shows the
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machine doing it, and `W` -- the clocks it costs on real silicon -- remains the
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project's largest open number (ROADMAP B1/B3).
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"""
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import sys, os, re
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sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
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from mc68450 import dcr, ocr, scr, XRM, DTYP, REQG
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src = sys.argv[1] if len(sys.argv) > 1 else "src/player/dma.i"
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if not os.path.exists(src):
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sys.exit(f"missing {src} -- run from the repo root.")
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text = open(src).read()
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def equ(name):
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m = re.search(rf"^{name}\s*=\s*\$([0-9A-Fa-f]+)", text, re.M)
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if not m:
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sys.exit(f"{src} no longer defines {name}. This script reads the "
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f"player's own equates; it does not keep a copy of them.")
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return int(m.group(1), 16)
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# The SCR the channel is given is written inline rather than equated, because it
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# is the same for both configurations and there is nothing to choose about it.
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m = re.search(r"move\.b\s+#\$([0-9A-Fa-f]+),DM_SCR", text)
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if not m:
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sys.exit(f"{src} no longer writes DM_SCR with a literal.")
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SCR = int(m.group(1), 16)
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CFG = [("BUS HELD", "DM_HELD_DCR", "DM_HELD_OCR"),
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("CYCLE STEALING", "DM_STEAL_DCR", "DM_STEAL_OCR")]
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print(f"WHAT src/player/dma.i PROGRAMS -- decoded from {src}\n")
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bad = 0
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for label, dn, on in CFG:
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D, O = equ(dn), equ(on)
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print(f" {label} DCR = ${D:02X} OCR = ${O:02X} SCR = ${SCR:02X}")
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for line in dcr(D):
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print(f" {line}")
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for line in ocr(O):
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print(f" {line}")
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for line in scr(SCR):
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print(f" {line}")
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holds = (D >> 6 & 3) in (0, 3) # burst, or cycle steal WITH hold
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dual = (D >> 4 & 3) in (0, 1)
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tomem = bool(O & 0x80)
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checks = [
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(dual, "DTYP must be explicitly addressed: only channel 0 has device "
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"callbacks in this machine, so an implicit-address DTYP on "
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"channel 1 falls through to the dual-address path anyway"),
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(tomem, "OCR DIR must be device -> memory; this is a READ"),
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((O >> 4 & 3) == 0, "OCR SIZE must be byte: the SPC's port is 8 bits"),
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((O >> 2 & 3) == 0, "OCR CHAIN must be none until P5a picks a chaining "
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"scheme for the two-deep request queue (FINDINGS 55.3)"),
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((SCR & 3) == 0, "SCR DAC must not count: the device address is a "
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"REGISTER at $EA0015 and must not walk off it"),
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((SCR >> 2 & 3) == 1, "SCR MAC must increment: the record is contiguous"),
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((O & 3) in (0, 1), "OCR REQG must be an AUTO-request mode: the "
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"expansion slot has no request line to the DMAC in "
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"this machine, so external request cannot be run"),
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]
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if label == "BUS HELD":
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checks.append((holds, "the held configuration must decode as a mode "
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"that KEEPS the bus between operands"))
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checks.append(((O & 3) == 1, "and as max-rate auto-request: MAME models "
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"a held bus only for burst + REQG 01"))
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else:
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checks.append((not holds, "the stealing configuration must decode as a "
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"mode that RELEASES the bus between operands "
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"-- otherwise the two have no contrast"))
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for ok, why in checks:
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if not ok:
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print(f" FAIL: {why}")
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bad += 1
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print()
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print("""AGAINST THE MACHINE'S OWN DISK CHANNEL (21_iplrom_dmac.py, FINDINGS 52.5)
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IPL ROM ch1, SASI DCR $80 OCR $B2 dual address, 8-bit port, cycle steal
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WITHOUT hold, EXTERNAL request
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-> a full arbitration per byte, 16..19
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player, held DCR $00 OCR $81 dual address, 8-bit port, BURST,
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auto-request at max rate
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-> the ladder's dual-address held row, 9
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Sharp's own configuration and the player's differ in exactly the field that
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decides the project. That is 52.5's finding read the other way round: a cheaper
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configuration IS reachable for an explicitly-addressed 8-bit port, and what it
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costs on real silicon is still ROADMAP B3's question and not this file's.""")
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sys.exit(1 if bad else 0)
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