Put the SPC on the 68000, and find P4 was blocked on a file nobody needed
ROADMAP P4, first half. Every byte the player has ever consumed was placed in emulated RAM by a host: decode.lua preloaded a container, stream.lua answered a mailbox at a modelled rate. src/player/scsi.i selects a SCSI target on a real MB89352 and issues READ(10) itself -- 4,096 B from LBA 0 and 2,048 B from LBA 1000, both byte-for-byte against the host's copy of the same volume, with no IOCS and no host in the transfer path. The non-zero LBA is the half that matters: a driver that emits a malformed LBA field still passes block 0, because zero is what a malformed field usually is. P4 was recorded as blocked in this tree and was not. Session 21's handoff said MAME's x68000 has no MB89352 path; -exp1 cz6bs1 instantiates one next to the HD63450, and FINDINGS 32.4 had read that card's DMA glue in session 9. The session-21 note is a regression in the record, not a discovery. What is genuinely absent is the 8 KB scsiexrom.bin MAME requires to INSTANTIATE the card and the player never executes -- driving the SPC registers directly has been the plan since BENCHMARK item 4 in session 2 -- so scsi_run.sh supplies a zero-filled placeholder on its own rompath, leaves the user's romset alone, and lets MAME print WRONG CHECKSUMS as it should. B3 is untouched: it wants that ROM's bytes disassembled and a blank one has none. The register map is measured, not inferred, and it corrects MAME's own documentation. The probe walks $EA0000..$EA003F one address at a time with a bus-error handler that records the fault and steps the index, because a sequential dump reports the first hole as the answer -- the earlier version took a bus error at $EA0006 and knew nothing about the other 57. 60 of 64 answer; the two holes are exactly the TMOD and EXBF the MB89352 omits and the MB87030 has. MAME leaves HOLES and does not shift the later indices down, which its own device summary claims it does, and that is what keeps DREG at $EA0015. The data register is DMA-only here and a PIO write vanishes. x68k_scsiext.cpp glues $EA0015 and nothing else, and with exown() asserted and DRQ low the byte is discarded: no error bit, no status change, no interrupt. Quieting all four DMAC channels does not change it. Measured rather than reasoned about -- write $5A, read back $00 with the FIFO still empty -- because ten command bytes vanishing without trace looks exactly like a target refusing a command, which is how it first presented. So every transfer runs the SPC in DMA mode and the CPU moves the bytes through the DMAC's own door. That costs the argument something, and it is easy to overclaim here: with exown asserted at idle MAME cannot distinguish a CPU-driven byte at $EA0015 from a DMAC-driven one. This shows the DATA PATH and cannot by itself show that the HD63450 is driving it, which is precisely what ROADMAP calls P4's first job. Whether a real CZ-6BS1 also refuses PIO there is not settled; it is a property of MAME's model and it wants a board. W did not move by one clock, and could not have. MAME's device models are functional rather than transfer-timing accurate and 42.5 reads its DMAC configured in wall-clock attotimes, so this is BENCHMARK Tier 1 -- does the read path work -- and never Tier 2. W is still the largest open number here. Five bugs, four of them silent, recorded in 57.5 because the pattern is the finding: a chain of rol.l #8 that loaded a transfer counter of ZERO from a count of 10; a byte handed to a FIFO mistaken for a byte on the bus; a fixed phase sequence where the bus decides the order; the discarded PIO write; and an initiator that must drop ACK and only then release the bus. The last appeared only once there were TWO reads -- one passed byte-exact and every conclusion from it was sound, and the second could not select. A player issues one command per record, so that failure would have been universal in the ring and invisible in a one-read demonstration. No decoder code changed; decode.bin is still 1,296 B at the same MD5. check.sh gains a SCSI stage that builds the volume out of the same stream_disk.bin the ring rig reads, gates the register window at 60 of 64 and both reads byte-exact, and skips when chdman is absent. ALL GREEN before and after. Claude-Session: https://claude.ai/code/session_01194oWYW8DQXK1SZ2DnChW6
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@@ -5,6 +5,7 @@ Amended end of session 21: P1 done, P2 half done (FINDINGS 53).
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Amended end of session 22: P3 done (FINDINGS 54).
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Amended end of session 23: P5 done (FINDINGS 55).
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Amended end of session 24: G1 done (FINDINGS 56).
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Amended end of session 25: P4 HALF done (FINDINGS 57).
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**THE COMPLETION TARGET IS M3, THE VERTICAL SLICE** (USER DECISION): one scene
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tree — a decision point, two outcomes, a death clip — with audio, streaming from
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@@ -159,7 +160,39 @@ period from `htotal - 8`), so the tree's "1/55.46 s granularity" was 1/56.69 s
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throughout. No 68000 cycle figure moves — the CPU clock is unrelated to the
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screen — but anything paced by the raster does. 54.5.
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**P4. Real transport.** Drive the MB89352 instead of a host file. **Session 23
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**P4. Real transport. HALF DONE, session 25 — FINDINGS 57.**
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~~Drive the MB89352 instead of a host file.~~ `src/player/scsi.i` selects a SCSI
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target and issues READ(10) on the 68000, with no IOCS and no host in the
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transfer path: **4,096 B from LBA 0 and 2,048 B from LBA 1000, both byte-exact**
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against the host's copy of the same volume.
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**This item was listed as blocked and was not.** Session 21 recorded "MAME's
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`x68000` has no MB89352 path"; `-exp1 cz6bs1` instantiates one, and FINDINGS
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32.4 had read that card's DMA glue back in session 9. The real gap was the 8 KB
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`scsiexrom.bin` MAME needs to instantiate the card and **the player never
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executes**; a blank placeholder on a separate rompath settles it. **B3 still
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wants the real ROM's bytes** and is untouched by this.
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**What is left is the half that decides the project**, and it is now two pieces:
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**P4a. A DMAC configuration that HOLDS THE BUS.** Unchanged as the first job,
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but 57.3 changes how it can be shown: `x68k_scsiext.cpp` glues `$EA0015` so that
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a write is discarded when `exown()` is asserted and DRQ is low, and on this
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machine `exown()` is asserted at idle. Every transfer therefore runs the SPC in
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DMA mode with the CPU moving the bytes through the DMAC's own door — and **MAME
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cannot then distinguish a CPU-driven byte from a DMAC-driven one at that
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address**. "The DMAC held the bus" needs evidence that does not come from
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watching `$EA0015`.
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**P4b. `scsi.i` behind `ring.i`'s `XF_*` mailbox**, in place of `stream.lua`'s
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modelled transport, gated on the same pixel-exact 120 frames. The seam already
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exists: `XF_ACK` stops being a word a host synthesises from emulated time and
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becomes one the 68000 bumps when a transfer lands.
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`W` **did not move by one clock** and is still the largest open number here.
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*(original item, still the standing description of the `W` question:)*
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Drive the MB89352 instead of a host file. **Session 23
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added a second axis to it:** `W` is the clocks stolen per delivered byte, and
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55.3 measured that the player's own request loop gives away 3-7% of the pipe
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before `W` is even asked about. A transport design has to answer both. The `W`
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