prosolis
b49bbdc939
src/player/decode.s now paints v7 literal spans, pixel-exact under MAME and px68k's C68K core over a container where every frame carries 128-216 spans covering up to 38% of the picture. The span pass is blit.s v7 verbatim: the 66.0/9.143/9.978 fit was measured on that instruction sequence. The container is DLX3 -- a span section between the mode header and the block payload, since that is the only place the 68000 can reach without first parsing something of variable length. 16_span_roundtrip.py gates it in check.sh, and asserts it emitted enough spans to have tested anything. Two synthetic all-SPAN anchors price v7 inside decode.s at 151.2 and 225.6 clocks per 4x4 block, against FINDINGS 40's table of 151 and 226 -- 0.2% on both emulators. The measured mode costs what it was said to cost. Two things that were not on the list: TWO BYTE BUDGETS. FINDINGS 40's 18/120 was scored against the 488 KB/s PIPE, not the 280 KB/s profile, and at the profile rate the lam search has already spent the allowance -- spans fired on 5 frames of 120 and looked like a regression. The profile is a chosen quality rate point; the pipe is hardware. --kbps and --span-kbps are now separate and spans run before mu, because a span pays in bytes and mu pays in picture. Delivered: 86/120 over budget without spans, 77/120 at the profile budget, 34/120 on the pipe for +0.36 dB. C_SKIP_MIXED WAS NEVER MEASURED, and it was 18% low -- 45.0, now 55.0. It is the one constant in the table that came from a derivation, because the synthetic frame that would measure it cannot exist: a byte needs a coded block for its SKIP to be mixed. Four bracketing anchors measure it on both emulators with the header byte rotated through all four positions, and the partner mode solves back to its own anchored value to 0.2%. With it corrected the model predicts a real spanned decode to -0.06% mean / 0.09% worst, against -2.99% / 4.30%. It matters because a span marks its run SKIP, so mixed SKIPs dominate exactly the frames spans are judged on. Also: the rig had been writing its synthetic timing frames 26 KB past the top of a 2 MB machine, and got away with it because the modes it overran are data-independent. A span's jump displacements come out of the stream, so it is not. And frames-over-budget is no longer a safe headline -- the controller aims at the deadline, so 55 of 120 frames sit within 5% of it and a 1% cost shift moves 22 frames. FINDINGS 41. check.sh ALL GREEN, now gating on a span-heavy DLX3 container. Claude-Session: https://claude.ai/code/session_01194oWYW8DQXK1SZ2DnChW6
143 lines
6.4 KiB
Python
143 lines
6.4 KiB
Python
#!/usr/bin/env python3
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"""How much of the bus does the 68000 decoder actually leave for a DMAC?
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python3 tools/analysis/15_bus_occupancy.py [container.dlx] [--nframes N]
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FINDINGS 29.6's DMAC idea only pays if the DMAC can find bus slots the CPU is
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not using. That is not a cycle count, it is a BUS count, and nothing in the tree
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had one.
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Two sources, and the point is that they check each other:
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DATA accesses MEASURED by tools/bench/c68k/c68k_bench, which counts every
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Read/Write callback the C68K core makes. Exact.
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INSTRUCTION DERIVED here by walking src/player/decode.s's straight-line
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prefetch paths in tools/bench/decode.lst and multiplying by the mode
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histogram. Not measurable from either emulator: MAME's core
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does not expose a fetch count and C68K reads opcodes straight
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through a host pointer with no callback.
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If the derived DATA figure matches the measured one, the derived PREFETCH figure
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from the same walk is trustworthy too. That check is the first thing printed,
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and this script exits non-zero if it fails.
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A 68000 bus cycle is 4 clocks, so a frame of C clocks holds C/4 bus slots.
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"""
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import sys, os, argparse, csv
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sys.path.insert(0, "tools/encoder")
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sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
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import numpy as np
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from dlx import DLX
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import buscost as B
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from buscost import V7_FRAME_PREF, V7_FRAME_DATA
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BUS_CLK = 4
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# --- straight-line path costs, read off tools/bench/decode.lst -------------
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# (instruction words, data bus cycles). A long access is two bus cycles on the
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# 68000's 16-bit bus; movem.l of N registers is 2N.
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#
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# dispatch move.b (a1),d0 / lsr.b / and.w #3 / beq .sk 6w, 1 read
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# + subq / beq .v1 -> 8w
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# + subq / bne .rw -> 10w
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# V4 body $10090..$100E2 = 82 B = 41w; 4 x (1 byte read
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# + movem.l 2 regs = 4 reads + 2 move.l = 4 writes) = 36
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# V1 body $100E2..$10106 = 36 B = 18w; 1 byte read
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# + movem.l 8 regs = 16 reads + 4 x movem.l 2 = 16 w = 33
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# RAW body $10106..$10164 = 94 B = 47w; 8 x (2 byte reads
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# + 1 move.l = 2 writes) = 32
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# .sk tail addq.l #8,a4 1w
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# BLOCK 0 has no lsr.b, so one of the four dispatches in a group is 1w cheaper.
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DISPATCH_SK, DISPATCH_V1, DISPATCH_V4 = 6, 8, 10
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BODY = {0: (0, 0), 1: (18, 33), 2: (41, 36), 3: (47, 32)}
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DISPATCH = {0: DISPATCH_SK, 1: DISPATCH_V1, 2: DISPATCH_V4, 3: DISPATCH_V4}
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SK_TAIL = 1
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GROUP_HEAD = 3 # tst.b (a1) 1w + beq allskip 2w
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GROUP_TAIL = 4 # addq.l #1,a1 / cmpa.l a5,a4 / bne byteloop
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ALLSKIP = 9 # the whole four-block fast path, tst.b included
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ROW_HEAD, ROW_TAIL = 3, 7
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ap = argparse.ArgumentParser()
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ap.add_argument("container", nargs="?", default="tmp/rc_fr_singe_scsi_cpufit.dlx")
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ap.add_argument("--csv", default="tmp/c68k_frames.csv",
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help="per-frame output of tools/bench/c68k/run.sh")
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ap.add_argument("--nframes", type=int, default=None)
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a = ap.parse_args()
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if not os.path.exists(a.container):
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sys.exit(f"missing {a.container}")
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d = DLX(a.container)
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meas = {}
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if os.path.exists(a.csv):
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for r in csv.DictReader(open(a.csv)):
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meas[int(r["frame"])] = (int(r["cycles"]),
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int(r["bus_reads"]) + int(r["bus_writes"]))
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NF = a.nframes or (max(meas) + 1 if meas else d.nframes)
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pref_t, data_t, cyc_t = [], [], []
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for f in range(NF):
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m = d.modes(f).reshape(d.nby, d.nbx)
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pref = d.nby * (ROW_HEAD + ROW_TAIL)
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data = 0
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for by in range(d.nby):
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row = m[by]
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for gi in range(0, d.nbx, 4):
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g = row[gi:gi+4]
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if (g == 0).all():
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pref += ALLSKIP; data += 1
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continue
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pref += GROUP_HEAD + GROUP_TAIL - 1 # BLOCK 0 has no lsr.b
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data += 1
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for b in g:
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b = int(b)
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pw, pd = BODY[b]
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pref += DISPATCH[b] + pw + SK_TAIL
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data += 1 + pd
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# The span section is bus traffic too, and it is most of the frame's data
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# accesses in a span-heavy container: 48 per 24-pixel chain unit. Leaving it
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# out would not merely understate the total -- it would break the CHECK
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# below, which is the whole licence for the prefetch figure.
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sp, _ = d.spans(f)
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if sp:
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pref += V7_FRAME_PREF; data += V7_FRAME_DATA
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for _, _, px in sp:
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sp_p, sp_d = B.v7_span_split(len(px))
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pref += sp_p; data += sp_d
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pref_t.append(pref); data_t.append(data)
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cyc_t.append(meas.get(f, (0, 0))[0])
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pref_t, data_t, cyc_t = map(np.array, (pref_t, data_t, cyc_t))
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print(f"{a.container}: {NF} frames, {d.nb} blocks/frame\n")
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if meas:
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md = np.array([meas[f][1] for f in range(NF)])
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err = 100 * (data_t - md) / md
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print("CHECK -- derived DATA bus cycles against the C68K harness's measurement")
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print(f" measured mean {md.mean():>10,.0f} /frame")
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print(f" derived mean {data_t.mean():>10,.0f} /frame "
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f"error {err.mean():+.2f}% mean, {np.abs(err).max():.2f}% worst")
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if np.abs(err).max() > 2.0:
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sys.exit("\nFAIL: the path walk does not reproduce the measured data "
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"accesses, so its prefetch figure cannot be trusted either.")
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print(" the walk reproduces the measurement, so its prefetch count stands\n")
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slots = cyc_t / BUS_CLK
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tot = pref_t + data_t
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print(f"{'':<22}{'mean':>12}{'median':>12}{'worst frame':>14}")
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for label, v in (("bus slots in a frame", slots),
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(" data accesses", data_t),
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(" instruction prefetch", pref_t),
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(" total bus cycles", tot)):
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print(f"{label:<22}{v.mean():>12,.0f}{np.median(v):>12,.0f}{v.max():>14,.0f}")
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occ = 100 * tot / slots
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print(f"{'bus OCCUPANCY':<22}{occ.mean():>11.1f}%{np.median(occ):>11.1f}%"
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f"{occ.max():>13.1f}%")
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free = slots - tot
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print(f"{'slots left for a DMAC':<22}{free.mean():>12,.0f}{np.median(free):>12,.0f}"
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f"{free.min():>14,.0f} (worst = fewest)")
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print(f"\nprefetch is {100*pref_t.sum()/tot.sum():.0f}% of the decoder's bus traffic: "
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f"the data-only\nfigure the harness prints understates occupancy by about 2x.")
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print(f"A DMAC painting spans at 8 clocks (2 bus cycles) per pixel could use at\n"
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f"most {free.mean()/2:,.0f} pixels' worth of the mean frame's spare slots "
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f"-- against {d.nb*16:,} pixels\nin a whole screen.")
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